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VeriFlow Technologies India (Pvt) Ltd is a product design
company. VeriFlow provides turn-key product development
and design expertise focusing on SOC/ASIC/FPGA designs
and lab bring up specializing in the industrial process
control systems.
VeriFlow Technologies India (pvt) Ltd is formed by a
seasoned team of experienced engineers who have
successfully developed electronic products that are well
accepted in the market. The project leads on the team have
worked in various companies in USA and India in the product
design of industrial process control equipments. The
VeriFlow team uses best of the class design & verification
methods for product design, encompassing pre-silicon
simulation, pre-silicon hardware accelerated simulation,
hardware emulation, hardware and software co-simulation,
lab bringup, diagnostic development and manufacturing test.
Depending on the needs of the client, VeriFlow can help in
product specification design, hardware and software design,
ASIC and FPGA designs & environments, developing
testplans, testbenches, simulation models, develop software
for simulation, FPGA or lab bringup. In addition, VeriFlow
can develop design & verification strategies, conduct tool
selection, help in resource planning and project
management.
VeriFlow Technologies India (Pvt) Ltd works with sister
concern VeriFlow Technologies, Inc. in Silicon Valley, USA
to team up on design and verification services to keep up
with industry’s best practices and tools that are used in the
electronic hardware and software design methodologies
currently used today.
Chandresh Patel
Chandresh Patel is relocated to Pondicherry, India in June
of 2006 after working for 22 years in Silicon Valley, USA to
start product development work at newly founded
VeriFlow Technologies, India (Pvt) Ltd. The new team has
successfully helped Silicon Valley clients to verify a
WiMax SOC project and is also developing internal design
and verification IP for SOC platforms.
Before co-founding VeriFlow Technologies, Inc. in
Cupertino, California, USA in 2004, Chandresh Patel was
involved in SOC/ASIC/FPGA/System design verification
projects across many San Francisco Bay Area companies
spanning from startups to midsize to fortune 500 company
projects. Chandresh Patel was also co-founder of
CAESIUM, Inc. which specialized in ASIC design
verification services from 1993 to 2000. Chandresh Patel
has over 25 years of experience in the design field
spanning boards, systems, microprocessor to ASIC to SOC
based products involving design IP and on-chip buses,
software/hardware co-simulation, pre/post silicon
simulation, acceleration and emulation where appropriate
based on the design constraints.
Chandresh was involved in the team designing
microprocessor, micro-computer design, mini-computer
design and also Unix Mainframe design. He has worked at
hands on technical level as well as in resource planning
and project management level for ASIC/system design
verification projects. Chandresh continues to provide
project lead design verification expertise as well as team
building for a large complex project.
Chandresh has worked four years in the early 80’s in
Pondicherry in the field of process control and computer
system design.
Chandresh earned MSCS in Computer Science from
Fairleigh Dickinson University in New Jersey in 1988 and
bachelor’s degree in electrical engineering from SAICE,
Pondicherry, India in 1979.
Kumar Talreja
Kumar Talreja has over 25 years experience in the design
and troubleshooting of electronic systems for Industrial
Machines. He is proficient in both Analog and Digital
Designs. He has designed controls for Industrial Sprayers,
Industrial Measuring machines, and various Motor
controlled machines and Industrial Ozonisers. On the
Analog side, he has vast experience with Op-amps, PLLs ,
opto-couplers and Power electronics including IGBTs.
Kumar has also been involved lately in embedded
systems designs using the latest Microcontrollers and
CPLDs covering the hardware and software aspects of the
projects. Presently, he is working on electronic systems
using FPGA’s to reduce cost and size of the products and
for increased modularity and configurability while
addressing the logic complexity of the projects.
He is well versed in C, C++, VB , Verilog HDL and SystemC.
Kumar finished his Bsc at Sri Aurobindo International
Centre of Education, Pondicherry.
Prabudha Khare
Prabudha has extensive engineering experience
spanning over 25 years. For the last six years, he was the
lead on several SOC, ASIC and FPGA design verification
projects in Silicon Valley USA. He has developed
reference models, bus functional models, self checkers,
monitors, testplans, verification strategies, coverage
analysis and regression environments using Verilog,
Vera, RVM, SystemC, C, C++ and Perl. He verified two
major blocks of a complex SOC at Airgo Networks in
Woodside, CA. He was at CIENA corporation in San Jose
for over three years where he successfully verified three
SONET framer ASICs and three FPGA designs.
Prabudha also has worked on several board and system
design projects for industrial process control in
Pondicherry, India. He has coded firmware for the projects
and has worked on qualifying the products to ISO
standards. The various industries that Prabudha has
worked in are automotive, leather processing, office
automation and computer system designs.
Prabudha earned a BS in Electronics & Computer Science,
1980 from Sri Aurobindo International Centre of Education,
Pondicherry, India.
Anand Prasad
Anand Prasad has worked in the capacity of an executive
officer in diverse range of commercial enterprises.
He started his carrier in early 80’s in Calcutta by starting a
business as a Raw material Supplier to the leading Paper
Mills and set up single handedly a unique network of
Waste Paper Traders coming under one roof to fight the
trading disparities and business disadvantages set
against them by the Leading Paper Mills in the region.
After four years in this venture, Anand decided came back
to Pondicherry, his base.
Anand joined a leading company CUSAG (P) LTD. who were
then pioneers in sales and service of Office Automation
products, where he worked as the Chief Executive Officer
for 10 Years from 1989 to 1999.
Feeling the ever growing need of expansion in relation to
the enormous demand for the Office Automation Products,
Anand branched out to create a new company, by the
name of “ELECTRO POINT SERVICES” which has today
become one of the leading brand names in the field of
Office Equipments in Pondicherry and south arcot district
of Tamil Nadu.
Anand now joins the team of seasoned engineers and
entrepreneurs with unique vision at “VeriFlow
Technologies, Inc.” and integrates himself as an active
member of the executive team.
Anand did his graduation (Bachelor of Arts) from SAICE-
Pondicherry in the year 1980. Economics, Psychology and
Philosophy being the main subjects of study.
Ambujavalli Rangaramanujam
Ambuja has varied experience in ASIC verification and
microcontroller based industrial control project designs
spanning ten years. She has worked with Verilog and
System Verilog for ASIC verification on unix platforms.
VCS/Virsim, Axiom, Xilinx, ACTEL Viewlogic
Education: BE in Electronics & Communication Engineering
Government College of Technology (GCT) 1992
Coimbatore.
Renju Sebastian
Resume
company. VeriFlow provides turn-key product development
and design expertise focusing on SOC/ASIC/FPGA designs
and lab bring up specializing in the industrial process
control systems.
VeriFlow Technologies India (pvt) Ltd is formed by a
seasoned team of experienced engineers who have
successfully developed electronic products that are well
accepted in the market. The project leads on the team have
worked in various companies in USA and India in the product
design of industrial process control equipments. The
VeriFlow team uses best of the class design & verification
methods for product design, encompassing pre-silicon
simulation, pre-silicon hardware accelerated simulation,
hardware emulation, hardware and software co-simulation,
lab bringup, diagnostic development and manufacturing test.
Depending on the needs of the client, VeriFlow can help in
product specification design, hardware and software design,
ASIC and FPGA designs & environments, developing
testplans, testbenches, simulation models, develop software
for simulation, FPGA or lab bringup. In addition, VeriFlow
can develop design & verification strategies, conduct tool
selection, help in resource planning and project
management.
VeriFlow Technologies India (Pvt) Ltd works with sister
concern VeriFlow Technologies, Inc. in Silicon Valley, USA
to team up on design and verification services to keep up
with industry’s best practices and tools that are used in the
electronic hardware and software design methodologies
currently used today.
Chandresh Patel
Chandresh Patel is relocated to Pondicherry, India in June
of 2006 after working for 22 years in Silicon Valley, USA to
start product development work at newly founded
VeriFlow Technologies, India (Pvt) Ltd. The new team has
successfully helped Silicon Valley clients to verify a
WiMax SOC project and is also developing internal design
and verification IP for SOC platforms.
Before co-founding VeriFlow Technologies, Inc. in
Cupertino, California, USA in 2004, Chandresh Patel was
involved in SOC/ASIC/FPGA/System design verification
projects across many San Francisco Bay Area companies
spanning from startups to midsize to fortune 500 company
projects. Chandresh Patel was also co-founder of
CAESIUM, Inc. which specialized in ASIC design
verification services from 1993 to 2000. Chandresh Patel
has over 25 years of experience in the design field
spanning boards, systems, microprocessor to ASIC to SOC
based products involving design IP and on-chip buses,
software/hardware co-simulation, pre/post silicon
simulation, acceleration and emulation where appropriate
based on the design constraints.
Chandresh was involved in the team designing
microprocessor, micro-computer design, mini-computer
design and also Unix Mainframe design. He has worked at
hands on technical level as well as in resource planning
and project management level for ASIC/system design
verification projects. Chandresh continues to provide
project lead design verification expertise as well as team
building for a large complex project.
Chandresh has worked four years in the early 80’s in
Pondicherry in the field of process control and computer
system design.
Chandresh earned MSCS in Computer Science from
Fairleigh Dickinson University in New Jersey in 1988 and
bachelor’s degree in electrical engineering from SAICE,
Pondicherry, India in 1979.
Kumar Talreja
Kumar Talreja has over 25 years experience in the design
and troubleshooting of electronic systems for Industrial
Machines. He is proficient in both Analog and Digital
Designs. He has designed controls for Industrial Sprayers,
Industrial Measuring machines, and various Motor
controlled machines and Industrial Ozonisers. On the
Analog side, he has vast experience with Op-amps, PLLs ,
opto-couplers and Power electronics including IGBTs.
Kumar has also been involved lately in embedded
systems designs using the latest Microcontrollers and
CPLDs covering the hardware and software aspects of the
projects. Presently, he is working on electronic systems
using FPGA’s to reduce cost and size of the products and
for increased modularity and configurability while
addressing the logic complexity of the projects.
He is well versed in C, C++, VB , Verilog HDL and SystemC.
Kumar finished his Bsc at Sri Aurobindo International
Centre of Education, Pondicherry.
Prabudha Khare
Prabudha has extensive engineering experience
spanning over 25 years. For the last six years, he was the
lead on several SOC, ASIC and FPGA design verification
projects in Silicon Valley USA. He has developed
reference models, bus functional models, self checkers,
monitors, testplans, verification strategies, coverage
analysis and regression environments using Verilog,
Vera, RVM, SystemC, C, C++ and Perl. He verified two
major blocks of a complex SOC at Airgo Networks in
Woodside, CA. He was at CIENA corporation in San Jose
for over three years where he successfully verified three
SONET framer ASICs and three FPGA designs.
Prabudha also has worked on several board and system
design projects for industrial process control in
Pondicherry, India. He has coded firmware for the projects
and has worked on qualifying the products to ISO
standards. The various industries that Prabudha has
worked in are automotive, leather processing, office
automation and computer system designs.
Prabudha earned a BS in Electronics & Computer Science,
1980 from Sri Aurobindo International Centre of Education,
Pondicherry, India.
Anand Prasad
Anand Prasad has worked in the capacity of an executive
officer in diverse range of commercial enterprises.
He started his carrier in early 80’s in Calcutta by starting a
business as a Raw material Supplier to the leading Paper
Mills and set up single handedly a unique network of
Waste Paper Traders coming under one roof to fight the
trading disparities and business disadvantages set
against them by the Leading Paper Mills in the region.
After four years in this venture, Anand decided came back
to Pondicherry, his base.
Anand joined a leading company CUSAG (P) LTD. who were
then pioneers in sales and service of Office Automation
products, where he worked as the Chief Executive Officer
for 10 Years from 1989 to 1999.
Feeling the ever growing need of expansion in relation to
the enormous demand for the Office Automation Products,
Anand branched out to create a new company, by the
name of “ELECTRO POINT SERVICES” which has today
become one of the leading brand names in the field of
Office Equipments in Pondicherry and south arcot district
of Tamil Nadu.
Anand now joins the team of seasoned engineers and
entrepreneurs with unique vision at “VeriFlow
Technologies, Inc.” and integrates himself as an active
member of the executive team.
Anand did his graduation (Bachelor of Arts) from SAICE-
Pondicherry in the year 1980. Economics, Psychology and
Philosophy being the main subjects of study.
Ambujavalli Rangaramanujam
Ambuja has varied experience in ASIC verification and
microcontroller based industrial control project designs
spanning ten years. She has worked with Verilog and
System Verilog for ASIC verification on unix platforms.
- * System Verilog Foundation Class Library (AHB
subsystem)
* Fiber channel based Storage Area Network (SAN)
systems
* Electronic Diesel Smoke Meter
* Coffee /tea Vending Machine Controller
* Automatic Mains Fail Detector Controller
* EPROM Emulator
* Alarm card for OLTE /OLRE
* Digital Data bus for Strategic Aircraft
* Fail Safe signaling system
* Remote Control Unit for Digital TV
VCS/Virsim, Axiom, Xilinx, ACTEL Viewlogic
Education: BE in Electronics & Communication Engineering
Government College of Technology (GCT) 1992
Coimbatore.
Renju Sebastian
Resume
- Education:
MSc Electronics, 2004 from Bharathidasan University,
Trichy, Tamil Nadu India
BSc Electronics, 2002 from Mahathma Gandhi
University, Kottayam, Kerala
4 months VLSI Design course work, Chennai
- Languages: System Verilog, Verilog, VHDL
Tools: Modelsim, Xilinx, Matlab, Axiom, Leonardo
Spectrum Synthesiser
- Projects:
* System Verilog Foundation Class Library (AHB
subsystem)
* IEEE transaction Papers Implemented as
projects in Verilog and VHDL
* Space vector modulation(SPVM)
* Elliptic curve cryptography
* FFT Processor
* Hardware Implementation of finger printing
algorithm for digital cinema
* Digital Synchronous Buck converter
* FPGA Based Wave-pipelined Dsp Block
* Improved BIST Diagnosis Method
VeriFlow Team India
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Pondicherry |