SOC, ASIC, FPGA, System Design and
Verification Expertise
* Embedded Hw/Sw co-verification skills
* Source code control/regression automation
* Large system simulation and verification setup
* Behavioral, RTL, GATE/Timing simulations and
 modeling, ASIC/FPGA Emulation
 Verilog, VHDL, System Verilog, OVM
 Perl, Shell scripting, Makefiles
 C, C++, Assembler
Project management
Resource analysis/managment
Professional and courteous client relationship
Across continents/time zone seamless skilled teams
Senior member 25+ years experience, average 12+ years
Excellent communication and written skills
Core Competencies