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SOC Verification IP : AHB set
* AHB System verification
* AHB Master VIP
* AHB Slave VIP
* AHB Monitor VIP
 | Task Based Verification Interface | |
| Verilog, System Verilog | |
| Monitor watches many corner cases | |
AHB Verification IP
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| Task Based Verification Interface | |
| Verilog, System Verilog | |
| Monitor watches many corner cases | |
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